Field of the Invention
The present invention relates to a printed circuit board in which a printed wiring board and a semiconductor package are connected with connection terminals.
Description of the Related Art
In order to realize a further reduction in size and higher functionality of electronic equipment, a printed wiring board has been demanded to increase the wiring density and increase the speed of circuit operation. In order to increase the density of the printed wiring board, the wiring width and the wiring gap decrease in signal lines (pattern) extending in the in-plane direction (horizontal direction to the surface of the printed wiring board) of the printed wiring board. In via conductors formed in vias forming wiring in the out-of-plane direction (vertical direction to the surface of the printed wiring board) of the printed wiring board and connection terminals (for example, solder balls) connecting the printed wiring board and a semiconductor package substrate, the pitch becomes narrower and the diameter becomes smaller.
On the other hand, in order to increase the speed of circuit operation, not only the signal cycle but the transition time required for switching the logic level of signals becomes shorter in the waveform of electric signals which propagate through a printed circuit board.
The increase in density and the increase in speed of circuit operation of a printed circuit board cause turbulence of a signal waveform due to electromagnetic coupling from an adjacent signal, i.e., a problem of signal integrity which is so-called actualization of crosstalk noise.
In general, in the signal waveform, a noise margin to a threshold value voltage is specified in a stable section of the logic level. However, it has become difficult to secure the noise margin due to superimposition of crosstalk noise. Heretofore, a measure against the crosstalk noise has been taken for wiring (wiring length of about 10 [mm]) in the in-plane direction. However, the level of the crosstalk noise in the via conductors (signal vias) or the solder balls (wiring length of about 2 [mm]) forming the wiring in the out-of-plane direction is not negligible with respect to the noise margin.
As a former technique of reducing the crosstalk noise between the signal vias forming wiring in the out-of-plane direction, Japanese Patent Laid-Open No. 2005-340247 has proposed a method for disposing a via of a ground potential between signal vias close to each other.
However, when the method described in Japanese Patent Laid-Open No. 2005-340247 is applied to a structure in which signal vias have already been disposed at the smallest interval in terms of manufacturing, a problem has arisen in that the interval of the signal vias has been required to be extended, resulting in an increase in the mounting area.
The technique disclosed in Japanese Patent Laid-Open No. 2005-340247 is a technique for reducing the crosstalk in the signal vias and has not been able to reduce the crosstalk in the solder balls.
Then, the present invention aims at reducing crosstalk noise generated between connection terminals without increasing the mounting area.